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J3H081 Mgbawa Dual Interface CPU Card

CATEGORY na mkpado:
Java Card / CPU Card , ,

model: HCJH81

The J3H081 is Upgraded Version of J3A081.

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  • Description

Product Status
Product Name:UCOS 3.0 JCOP ibe & smart Cards
Product Life Status:Product na asambodo–sample avaliable
Asambodo:BCTC Certified(PBOC 3.0, PBOC 2.0)
NSICCS Asambodo anya maka March, 15
visa, MasterCard Asambodo anya maka September, 15

Main Njirimara
ROM apleetị:Dual PBOC 3.0, Dual PBOC 2.0, NSICCS 1.1, Dual PSE 1.2
EEPROM apleetị
User Memory E Nwere:40K ~ 80Kbytes

Standard n'ikedo
JC Hapụ:2.2.1
GP Hapụ:2.1.1

Kpọtụrụ Interface
Standard n'ikedo:ISO 7816
T = 0:Ee
T = 1:Ee

Contactless Interface
Standard n'ikedo:ISO 14443-2, -3, -4 Type A na M1 1K emulation
T = cl:Ee
Baud Tate:106Kbit / s, 212Kbit / s, 424Kbit / s na ma ụzọ
operating Frequency:13.56MHz

ọgbàràùhie algọridim
Des / 3DES:Ee
AES:Ee: 16,24 na 32 btyes
RSA:Ee ruo 2048 bit
SHA1:Ee
SHA256:Ee

kaadị Isi
Mgbawa Site / Type:Kpọtụrụ, Contactless, Dual Interface
Dị iche iche modul ulo oru nkwakọ forms na ina
mpi:Full size(nanị embossing ebe)
Standard n'ikedo:ISO 14443-1 Dabara, etc.
ihe:Banking ọkwa ịkwanyere na machie maka ikenye keonwe
Technology:Hot lamination etc mgbe kaadị n'ichepụta teknụzụ
magnetik straipu:ISO 7811-4, -5 Dabara

 

NXP original J3H081 chip dual interface CPU card is NXP's high-security system solution for high-performance smart chip card products. It is ideally suited for multi-application markets such as banking and finance, mobile communications, public transportation, access control access and network access. J3H081 dual interface CPU card JAVA card JCOP J3 V2.4.2 version supports contact and contactless read and write, contains a JCOP J3 V2.4.2 version of the operating system, and provides 80k bytes of EEPROM memory.
NXP original J3H081 chip dual interface CPU card is an upgraded version of J3A081 chip, it is backward compatible with J2A080, JCOP21-72K (JCOP21-72K chip has been discontinued) chip card, can be initialized according to the specific needs of customers, and change the ATR value, the chip's Initialize the T=0 or T=1 value.
JCOP Version: JCOP J3 V2.4.2.

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