Main Paramedrau Technegol
prosesydd
CPU: 32-bit ARM SC000 Timer: 2 pieces 16/32bit Timers System clock: clock source 40MHz External clock: 1MHz~10MHz
cof
Ram: 10K Beitiau
EEPROM:
80Kbytes
Yn fwy na 500,000 times erase and write Data retention time is greater than 30 flynyddoedd Support page wipe/page write ROM: 320 Kbytes (Defnyddiwr 280kBytes, CMS 40KBYTES)
rhyngwyneb
ISO / IEC 14443 Typea: Supports frame reception/frame transmission Support bit-wise anti-collision Support hardware processing 14443-3 instructions and logical encryption authentication instructions Highest communication rate 848kbit/s
ISO / IEC 7816: Compatible with ISO/IEC 7816 T=0/T=1 protocol Support for forward and reverse conventions configurable Parity mode configurable
GPIO: 4
Nodweddion Trydanol Work field strength: 1.5A/m~7.5A/m
foltedd Gweithio: 1.62V ~ 5.5V
tymheredd gweithio: -25℃ ~ + 85 ℃
ADC: >4000V
Card Parameters
maint: CR80 card L 85.6×W 54×T 0.84(± 0.4)mm
deunydd: PVC / ABS / PET / PETG / PHA, 0.13gwifren gopr mm
Proses amgáu: MF2D80
Mae sglodyn model HCJ72B yn sglodyn cerdyn IC smart rhyngwyneb deuol a ddatblygwyd gan China Chip Design Company ac sy'n gydnaws â sglodion J3A081 a J3H081 JAVA. Mae'r CPU sglodion HCJ72B yn SC000 32-did ARM. Mae'n defnyddio storio data EEPROM. Cefnogi ISO/IEC 14443 Typea, ISO / IEC 7816 T=0/T=1 protocol cyfathrebu. cyfryngau DES/3DES, SSF33, SM1/SM2/SM3/SM4, ac algorithmau caledwedd RSA. Cwrdd â gofynion diogelwch sglodion talu ariannol.
Prif gais
Iechyd preswylwyr
Bws dinas
Microdaliad
Taliad safonol ariannol
Fung
Rheolwr Gwerthiant