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Tarheta JAVA yá tarheta CPU

» Tarheta RFID » Tarheta JAVA yá tarheta CPU

Tarheta ar CPU interfaz dual chip J3H081, Original NXP J3H081 Chip Dual Interface CPU Card

CATEGORÍA NE ETIQUETAS:
Tarheta JAVA yá tarheta CPU , , , ,

Modelo producto: HCJH81

The J3H081 is Upgraded Version of J3A081.

Nthoni
  • Especificaciones
  • Descripción

Product Status
Product NameUCOS 3.0 JCOP Chips & Smart Cards
Product Life StatusProduct in certificationSample avaliable
certificación:BCTC Certified(PBOC 3.0, PBOC 2.0)
NSICCS Certification expected for March, 15
VISA, MasterCard Certification expected for September, 15

Main Characteristics
ROM AppletsDual PBOC 3.0, Dual PBOC 2.0, NSICCS 1.1, Dual PSE 1.2
EEPROM Applets
User Memory Available:40K~80Kbytes

Standard Compliance
JC Release:2.2.1
GP Release:2.1.1

Contact Interface
Standard Compliance:Iso 7816
T=0:Hä
T=1:Hä

Contactless Interface
Standard Compliance:Iso 14443-2, -3, -4 Type A with M1 1K emulation
T=CL:Hä
Baud Tate:106Kbit/s, 212Kbit/s, 424Kbit/s in both ways
Operating Frequency:13.56Mhz

Cryptographic Algorithms
DES/3DES:Hä
AES:Hä: 16,24 Ne 32 btyes
RSAYes up to 2048 bit
SHA1:Hä
SHA256:Hä

Card Body
Chip From/TypeContact, 'Ñotho ar contacto, Interfaz dual
Various module industrial packaging forms on demand
Antena:Full size(restricted embossing area)
Standard Compliance:Iso 14443-1 compliant, etcetera.
hñei:Banking grade PVC with overlay for posting personalization
Tecnología:Hot lamination etc regular card manufacturing technologies
Magnetic Stripe:Iso 7811-4, -5 compliant

Original NXP J3H081 chip dual interface CPU card is NXP's high-security system solution for high-performance smart chip card products. It is ideally suited for multi-application markets such as banking and finance, mobile communications, public transportation, access control access and network access. J3H081 dual interface CPU card JAVA card JCOP J3 V2.4.2 version supports contact and contactless read and write, contains a JCOP J3 V2.4.2 version of the operating system, and provides 80k bytes of EEPROM memory.
NXP original J3H081 chip dual interface CPU card is an upgraded version of J3A081 chip, it is backward compatible with J2A080, JCOP21-72K (JCOP21-72K chip has been discontinued) chip card, can be initialized according to the specific needs of customers, and change the ATR value, the chip's Initialize the T=0 or T=1 value.
JCOP Version: JCOP J3 V2.4.2.
J3H081 has passed CEAL 5+ certification.
The encryption algorithms supported by J3H081 are as follows: DES/3DES, AES (256 bits), RSA (2048 bits), ECC GF (p) (576 bits), SHA (512 bits), MD5, Korean Seed, TRING, SSCD Type3, KEN Gen. RSA CRT& EC GF(p).
Optional support for Mifare PLUS EV1 and Mifare Desfire EV2.

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